The NTE is a monolithic 4-line-toline decoder in a Lead DIP type The NTE is fully compatible for use with most other TTL and DTL circuits. MOS technology. A binary code applied to the four inputs (A to D) provides a low level at the selected one of sixteen outputs excluding the other fifteen outputs. SNN .. of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration.
|Published (Last):||20 January 2016|
|PDF File Size:||2.81 Mb|
|ePub File Size:||2.11 Mb|
|Price:||Free* [*Free Regsitration Required]|
Sign up using Email and Password. These demultiplexers are ideally suited for implementing high-performance memory decoders.
That is, if the outputs were active high, OR gates would perform the synthesis desired. If you want to know exactly what is going on then draw out the truth table, but it is unlikely their function will make much sense to you. The active-low output is just how the design for that specific decoder was carried out – there is also active-high varieties.
Please consider upvoting those questions you found useful like this one by clicking the arrow pointing up near the answer vote count which is in turn above the checkbox you clicked to accept this question. Home Questions Tags Users Unanswered. Since the ouputs are active low, NAND gates do the job. You can upvote more than one answer. Sign up using Facebook. According to the internal logic diagram on the datasheet, the G inputs are connected to a two-input AND gate with inverting inputs, whose output feeds one input of all the NAND datsheet that produce the outputs.
As for the NAND gates, there is a function being implemented in which the gates are there to realize it. So is it possible that both enables are hooked to a 2-input OR gate; this is just making use of the extra pins to make 24?
Email Required, but never shown. Sign up or log in Sign up using Google.
The active-low enable inputs allow cascading of demultiplexers over many bits. Each of the 16 outputs can be connected through a resistor and then through an LED to serve as a simple 16 LED controller. First, the inversion of the outputs simply means that the output is active low. The person who took time to answer the question will appreciate that. Rather than providing only a single enable, both pins are used.
4 Line to 16 Line Demultiplexer / Decoder
All the other ouputs stay high. This allows more flexibility in the logic functions available. And why are there 2 of them, you ask? Download the dagasheet below for a more comprehensive summary.
All inputs are buffered and input clamping diodes are provided to minimize transmission-line effects and thereby simplify system design. Understand, this is a typical example of application, not it’s sole purpose.
74154 Datasheet PDF
I am a new user so I didn’t know I had that power. That is, for an input ofthe 0 output is selected, and it is driven low. This chip is often used in demultiplexing applications, such as digital clocks, LED matrices, and other graphical outputs. The demultiplexing function is performed by using the 4 input lines to address the output line, passing data from one of the strobe inputs with the other strobe input low.
4 to 16 decoder logic diagram – Electrical Engineering Stack Exchange
For example, if the target application requires 16 7-segment LED displays, but your microcontroller only has 4 lines to select which display is active, this chip 74LS would provide a very effective method of essentially multiplying datasheett selecting lines by a 4 times. Will someone please explain the purpose of inverting the outputs 0 through 15 as well as the use the NAND gates here?
However, due to the internal structure of theonly one output can be enabled at a time.